It is known to improve synchronous switching voltage regulator efficiency at light load conditions to have the regulator operate under diode emulation mode (DEM). With DEM enabled, the bottom-side MOSFET switch is disabled preventing negative current flow from the output inductor during low load operation. Under heavy loads, the voltage regulator operates under forced continuous conduction mode (FCCM). In FCCM, the controller always operates as a synchronous rectifier, switching the bottom-side MOSFET regardless of the output load. Thus, in FCCM, the inductor current flows in both directions.
FIG. 1 is a block diagram schematic showing a conventional pulse width modulation (PWM) controller and driver arrangement 100 showing conventional signaling to implement the diode emulation communication between a controller 110 and drivers 120 and 130, for a two-phase regulator system. The arrangement 100 uses dedicated FCCM pins. Driver 120 drives one phase and driver 130 drives the other phase. Specifically, controller 110 has an FCCM pin where an FCCM signal is provided and drivers 120 and 130 each have an FCCM pin for receiving the FCCM signal. Drivers 120 and 130 are each associated with respective phases. In a common embodiment, drivers 120 and 130 drive synchronous output switches coupled to an inductor which is connected to a load, such as a microprocessor. When the load is a microprocessor, the microprocessor generally provides a mode indicating signal generally referred to as a mode select signal which can be used as an external triggering signal to trigger the regulator to enter DEM.
The mode select signal is generally in one of two states indicative of the level of the load current drawn. For example, when the microprocessor senses the load current being heavy, the mode select can be in the “1” state. When the microprocessor senses the load current being light, such as below a predetermined current threshold set on the microprocessor, the mode select output can be in the “0” state. For INTEL® microprocessors, the mode select signal is referred to as a Processor Power Status Indicator (PSI# signal).
While the mode select signal asserted is low, the FCCM pin of controller 110 will send a low FCCM signal to initiate the drivers 120 and 130 into DEM to save power and improve light load efficiency. However, during significant output over voltage events, even if PSI# is asserted low, the controller 110 sends a high FCCM signal to turn on the low-side FET switch and sink current to protect the processor or other load from over voltage stress. This requires routing the FCCM signal to all drivers in multiphase arrangements. In the case the controller and gate drivers are on separate chips, as the number of phases increases, the PCB layout becomes complex and traces becomes crowded in a typical spacing limited motherboard. Moreover, some new controllers and gate drivers have low pin counts (e.g., 8 pins). As a result, there may be no controller or gate driver pin available for accommodation of an FCCM signal.
FIG. 2 is a simulated conventional diode emulation communication timing diagram 200 for one of the two phases controlled by signaling arrangement 100 shown in FIG. 1. The UGATE and LGATE signals are provided by gate drivers 120 and 130, which as known in the art, are coupled to upper and lower gates of synchronous output switches, respectively. The UGATE and LGATE signals are responsive to the FCCM and PWM signals provided by controller 110. Note the presence of a dedicated FCCM signal and the conventional two (2) state PWM signal used.
At time to, FCCM becomes low. In response, DEM mode is soon enabled, preventing negative current flow from the output inductor (IL) as shown between times t1 and t2 and times t3 and t4 in FIG. 2. A dedicated FCCM pin and the required signaling to implement DEM increases the pin count for both the controller and the driver as well as the layout complexity. What is needed is a simplified DEM communication method that eliminates the need for the presently required extra FCCM pin for the controller and the FCCM pin for the driver(s).